1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device employing dispersion type N (N≧2) dot inversion drive, in which polarities are inverted every N lines and there exist columns having polarity inversion lines located at positions different from each other.
2. Description of the Related Art
There has been employed dot inversion drive which inverts polarities for every adjacent pixel, as means for improving image quality of an active matrix display device. Conventionally, the dot inversion drive has been generally employed in large-sized panels for TV. In recent years, however, improvement of the image quality is also highly required for small/medium-sized panels for mobile equipment, and use thereof is increased. However, the dot inversion drive has a problem in that a large amount power is consumed due to charge/discharge. In the small/medium-sized panels for mobile equipment, in particular, achieving low power consumption is one of the most important requirements.
JP 2003-207760 A (hereinafter, referred to as Patent Document 1) discloses a technology for realizing the low power consumption. According to the technology described in Patent Document 1, as illustrated in FIG. 12, charge/discharge power consumption of a panel becomes 1/N by performing 1×N (N≧2) dot inversion drive. However, for example, when a tone of white is displayed on an entire liquid crystal panel 401, a line performing polarity inversion has heavier loads of a capacitance component (C) and a resistance component (R) in the panel compared with a line not performing polarity inversion, and hence insufficiency of writing may easily occur. Therefore, horizontal streaks and horizontal flicker due to the insufficiency of writing may occur in polarity inversion positions 402. In Patent Document 1, there is proposed a method in which voltages are applied to sub-pixels 401 in lines after inversion of polarities of the applied voltages for a longer time than in the remainder of the lines after inversion of polarities of the applied voltages. However, because 1 line period is short in a high definition panel, there is a fear that sufficient voltage applying time period may not be ensured. Therefore, there is a fear that horizontal streaks and horizontal flicker due to the insufficiency of writing may not be eliminated.
As a technology for solving the problem involved in Patent Document 1 described above, there is a technology described in JP 2005-215317 A (hereinafter, referred to as Patent Document 2). In the technology described in Patent Document 2, as illustrated in FIG. 13, there is proposed a method in which the lines performing polarity inversion are located at different positions in each column (pixel class including grouped sub-pixels 401). In this case, the polarity inversion positions 402 at which insufficiency of writing may occur are different in each column, that is, the polarity inversion positions 402 are spatially dispersed within the liquid crystal panel 401. Therefore, it is predictable that horizontal streaks and horizontal flicker may be prevented.
Further, JP 2008-116556 A (hereinafter, referred to as Patent Document 3) discloses a technology for realizing low power consumption. In the technology described in Patent Document 3, as illustrated in FIG. 14, a short circuit 206 for pre-charging is provided in an output section of a decoding circuit 205 for generating gray scale voltages in accordance with gray scale signals input from outside. The short circuit 206 includes switches for short-circuiting each output to a precharge voltage having the same polarity for a predetermined time period. In this manner, each output is short-circuited to the precharge voltage in the dot inversion drive, to thereby reduce power necessary to reach the precharge voltage, and hence low power consumption is achieved. For example, as illustrated in FIG. 15, in a case where a voltage in a range of −5 V to 0 V is output with negative polarity and a voltage in a range of 0 V to 5 V is output with positive polarity, all outputs are short-circuited to the ground level (0 V). A voltage level of the opposite polarity is output in the preceding line, and hence it is possible to reduce power necessary for increasing the voltage level from −5 V to 0 V at maximum when positive polarity writing is performed, and it is also possible to reduce power necessary for decreasing the voltage level from 5 V to 0 V at maximum when negative polarity writing is performed.
When the technology described in Patent Document 1 is combined with the technology described in Patent Document 3, there may be expected to achieve a large power consumption reduction effect. However, there is a possibility that image quality deterioration such as horizontal streaks and horizontal flicker as described above may occur. On the other hand, the technology described in Patent Document 2 and the technology described in Patent Document 3 may be combined, so that a large power consumption reduction effect may be achieved while suppressing deterioration in image quality.
However, the technology described in Patent Document 2 is difficult to combine with a precharge/short-circuit drive of the technology described in Patent Document 3, because polarity alternating points differ in each column. That is, in 1×4 dot inversion as illustrated in FIG. 13, in a case where the technology described in Patent Document 3 is employed when an output performing polarity inversion and an output not performing polarity inversion are mixed, power is necessary for causing the output not performing polarity inversion (case where the preceding line is positive and the writing line is positive, or both are negative) to once reach the voltage level of the opposite polarity. For example, in the case where the preceding line is positive and the writing line is positive, the power for increasing the voltage level, which is once short-circuited to the ground to be 0 V, to 5 V at maximum is necessary. Further, in the case where the preceding line is negative and the writing line is negative, the power for decreasing the voltage level, which is once short-circuited to the ground to be 0 V, to −5 V at maximum is necessary. Therefore, extra power is necessary, leading to a fear that the large power consumption reduction effect may be diminished.